Industry-leading energy efficiency

Unparalleled energy efficiency and flexibility to give developers the powerful computing solutions they need.

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Technology overview

Energy is everything

Efficient Computer is pioneering a new era in general-purpose computing by replacing energy-intensive, instruction-centric pipelines with the Fabric architecture designed for breakthrough energy efficiency. 

The synergy of the Electron E1 general-purpose processor and effcc Compiler delivers up to 100x better energy efficiency by executing real-world workloads as connected tasks in a spatial dataflow model. With unmatched energy efficiency, programmability, and performance, our technology eliminates energy constraints in edge computing and lets you build cutting-edge applications that were previously impossible.

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Efficient’s architectural advantage

Rearchitecting compute for zero wasted data movement

We’re not building on the status quo, we’re reimagining the general-purpose processor at its core. Efficient’s Fabric architecture replaces the 80-year-old serial execution model with a reconfigurable spatial dataflow array. By mapping application graphs directly onto hardware, the Fabric avoids the data movement tax inherent in Von Neumann CPUs, delivering accelerator-class efficiency of up to 1 TOPS/W for the entire application.

Category-defining energy efficiency

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Efficiency with a parallel performance boost

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The versatility of general-purpose programmability

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Your code doesn't change

What runs underneath it does

Your code, unchanged

Standard C, C++, and ML frameworks drop into the effcc Compiler.

One familiar step

The effcc Compiler takes it from here.
Same workflow, same tools.

Your program becomes a dataflow graph

Not a list of instructions to churn through, a map of operations laid out spatially.

On the Fabric, your program has a shape

When connecting operations sit far apart, data travels further. With Efficient's Non-Uniform Processing-Element Access (NUPEA) architectural design, we can account for this.

The effcc Compiler finds the right shape

Placement and routing happen automatically. You wrote C; the compiler did the rest.

Every operation has a home

Compute happens where the data is, on a grid of simple tiles. Each tile glows when its inputs arrive.

Data flows directly from operation to operation

No fetching, no decoding, no waiting, no central bottleneck.

Your whole program, running in place

Your application written in standard programing languages. The Fabric runs it as a spatial dataflow machine.

One compiler swap

The effcc Compiler accepts standard C and C++. No new language, no framework, no changes to the rest of your toolchain.

A graph node contains an operation

Each graph node is one operation from your code: an add, a multiply, a comparison. The compiler extracts them automatically.

An edge is dataflow

Each edge is data flowing from one operation to the next. The graph captures what your program actually needs to happen, in what order.

Distance costs energy

Moving data takes more energy than computing on it. The farther a value travels, the more it costs, so where operations sit matters.

The compiler finds the shape

The effcc Compiler explores placements and routes so data travels the shortest practical distance. This optimization is automatic.

Compute where the data is

This tile holds one operation from the original C code, with its inputs right beside it. No instruction fetch, no shared register file to wait on.

Strategic placement

Operations that feed each other are placed close to one another. A result lands exactly where it is needed next.

No central controller

The on-chip network carries data between tiles without a central controller orchestrating every step. The structure of the program is the schedule.

Producer to consumer

Values flow directly from the operation that produced them to the one that consumes them, the moment they are ready.

Electron E1 general-purpose processor

Redefining energy efficiency in general-purpose compute

Efficient’s Electron E1 general-purpose processor optimizes throughput by intelligently distributing workloads and connecting instructions across the Fabric architecture to reflect the application dataflow. It uses our Non-Uniform Processing-Element Access (NUPEA) innovation to place critical instructions proximal to memory, yielding an average 28% average speedup over traditional uniform architectures. Along with an integrated, energy-efficient RISC-V scalar core for control, Electron E1 scales from 5.4 GOPS at low voltage to 21.6 GOPS at high voltage.

This design delivers energy efficiency and performance while maintaining full programmability. With its scalable architecture, the Electron E1 supports applications from edge devices to wearables and more.

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Efficient’s effcc Compiler

Write conventional code,

get parallel execution

Efficient’s effcc Compiler works hand-in-hand with the Electron E1 processor – it is the key to unlocking all of the Fabric architecture’s capabilities without rewriting your code.

Our compiler leverages proprietary Modular Optimization Framework (MOF) technology to extract dataflow from high-level languages and frameworks–like C, C++, and TFLite–and optimally map it to the Fabric architecture. As a drop-in replacement for GCC/Clang, it eliminates the hours-long synthesis delays of FPGAs, providing ultra-fast compilation times and a familiar GDB-compatible debugging experience.

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How it works

Unlocking energy efficiency and performance

The effcc Compiler optimizes every step of your program’s operations for the Fabric architecture.

The trouble with most processors

Processors on the market today are still built on concepts developed over 70 years ago, with inherent limitations.

Traditional CPUs spend significant energy on the "instruction fetch/decode/execute" loop and constant data shuffling between registers and memory hierarchies. This overhead creates thermal and power ceilings that limit intelligence in constrained environments.

The power of hardware and software

The effcc Compiler transforms your source code into an optimized dataflow graph, while our place-and-route algorithms minimize wire length to reduce communication energy.

This tight coupling of software and hardware allows the Fabric architecture to reconfigure its interconnect for each kernel, providing sustained, real-world performance without the energy waste of a fixed-pipeline architecture. Our spatial dataflow execution keeps data close to compute and delivers up to 100x greater energy efficiency than leading low-power CPUs.

Expanding product capabilities

By combining high efficiency and strong performance, the Fabric architecture allows products to operate far longer, expanding their potential and enabling new use cases.

It lets you break free from the limitations of traditional processors and usher in what’s new.

FAQs

How the Fabric architecture works, and what it takes to build on it.

What is the Fabric architecture?

The Fabric architecture is a spatial dataflow design. Instead of pushing one instruction at a time through a pipeline, it lays your program out as a graph across a tiled grid of reconfigurable processing elements. There is no central program counter. Each operation fires when its inputs arrive, and the graph stays resident on chip for millions of cycles.

Where does the energy saving actually come from?

Most of the energy a conventional processor spends never touches your data. It goes into fetching and decoding instructions, and into moving values back and forth between registers, caches and memory. The Fabric removes that overhead structurally: values pass directly from the operation that produced them to the operation that needs them. That is the whole source of the up to 100x greater energy efficiency, and it is why the gain holds across a whole application rather than one hot kernel.

Is this an accelerator, an FPGA, or a domain-specific chip?

None of the three. An accelerator speeds up a fixed set of kernels and leaves the rest of your application on a host processor. An FPGA is configured with hardware description languages and a synthesis flow measured in hours. The Fabric architecture is general purpose: it runs whole applications, including irregular control flow and irregular memory access, and it is programmed in C and C++ with a compiler that finishes in minutes.

Do I have to write my code differently?

No. The effcc Compiler is a drop-in replacement for GCC and Clang, and it extracts parallelism from standard programming languages like C and C++ without annotations. You point it at your existing source and your existing build. Functions you want resident on the Fabric are marked with a single function attribute.

Does the Fabric replace the processor or sit alongside one?

It replaces it. The Electron E1 general-purpose processor is a complete part rather than a block you add to a host processor. It runs your whole application, including the control flow and the program entry that do not belong in a dataflow graph, so there is no companion microcontroller in the design and no traffic between two chips to budget for.

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What workloads is this good at?

The Electron E1 handles sensor fusion, signal processing, control loops, and neural network inference, which is to say the mix an always-on device actually runs rather than one kernel in isolation.

Does the energy efficiency cost me performance?

No, because the parallelism that saves energy is the same parallelism that does the work. Many operations run at once across the grid, so the Fabric sustains real throughput at low clock rates and low voltage. In turn, this means higher performance in addition to order-of-magnitude better energy efficiency.

How mature is this? Is there silicon?

Yes. The Electron E1 general-purpose processor exists in silicon, and the Electron E1 Evaluation Kit puts it on a board to bring up your applications on our silicon.

What does adopting this cost me in schedule?

Less than a new architecture usually costs, because the parts of your project that take time to change do not have to change. Your source stays C and C++, your build stays yours, and the effcc Compiler drops in where GCC or Clang sits today, so the first build is a compiler swap and a target flag rather than a rewrite. Compiles finish in minutes, so the development loop you work in now is the one you keep.

What happens when my application changes after the product ships?

You rebuild and reflash. How your program is laid out on the Fabric is decided by the compiler at build time and is not fixed in the silicon, so a new version of your application is a new build and a firmware update. Changing what the product does never means changing the part it does it on.