Industry-leading energy efficiency
Unparalleled energy efficiency and flexibility to give developers the computing solutions they need.
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Energy is everything
Today’s processors spend most of their energy moving data instead of computing. The usual answer is to add specialized hardware optimized for one kernel, which can’t support full workloads or scale as models change. Either way, the limitations are structural.
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Efficient Computer’s Fabric architecture removes those limits by design. We unlock hidden efficiencies in your program to deliver up to 100x better energy efficiency on real workloads, using the code and tools your team already has.
We’re not building on the status quo, we’re reimagining the general-purpose processor at its core. By intelligently mapping your program across the Fabric, we minimize data movement and deliver accelerator-class efficiency for the entire application.
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Your code already has efficiency. We unlock it.
Your code, unchanged
Standard C, C++, and ML frameworks drop into the effcc Compiler.
One familiar step
The effcc Compiler takes it from here.
Same workflow, same tools
Your program becomes a dataflow graph
Not a list of instructions to churn through, but a map of operations laid out spatially to maximize efficiency.
On the Fabric, your program has a shape
Spatially separated operations make data travel farther. We save energy by making placement part of the design.
The effcc Compiler finds the right shape
Placement and routing happen automatically. You wrote C. The compiler did the rest.
Every operation has a home
Compute happens where the data is, on a grid of simple tiles. Each tile lights up when its inputs arrive.
Data flows straight from operation to operation
No instruction fetch. No decode. No central bottleneck.
Your whole program, running in place
Your application written in standard programing languages. The Fabric runs it as a spatial dataflow machine.
One compiler swap
The effcc Compiler accepts standard C and C++. No new language, no framework, no change to the rest of your toolchain.
A graph node contains an instruction
Each node is one instruction from your code: an add, a multiply, a comparison. The compiler extracts them automatically.
An edge is dataflow
Each edge carries data from one instruction to the next. The graph captures what your program needs to happen, and in what order.
Distance costs energy
Moving data takes more energy than computing on it. The farther a value travels, the more it costs, so where operations sit matters.
The compiler finds the shape
Our Non-Uniform Processing-Element Access (NUPEA) design lets the effcc Compiler account for distance, then place and route so data travels the shortest practical path. Automatically.
Compute where the data is
This tile holds one instruction from your original C code, with its inputs right beside it. No instruction fetch, no shared register file to wait on.
Strategic placement
Operations that feed each other are placed close to one another. A result lands exactly where it is needed next.
No central controller
The on-chip network carries data between tiles with no controller orchestrating every step. The program structure is the schedule.
Producer to consumer
Values flow directly from the operation that produced them to the one that consumes them, the moment they are ready.
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The most energy-efficient general-purpose processor ever built
The Electron E1 general-purpose processor is the first silicon implementation of the Fabric architecture. It runs your entire application at up to 100x greater efficiency than the lowest power CPU, in the languages your team already writes. Its reconfigurable architecture allows applications to be updated in software, so your product design always stays current even as models evolve.
Same code, unlocked efficiency
The effcc Compiler lets you unlock game-changing efficiency without rewriting your existing code. A drop-in for GCC or Clang, it extracts dataflow from standard C, C++, and ML frameworks, maps it onto the Fabric, and compiles in minutes.
How the Fabric architecture works, and what it takes to build on it.
What is the Fabric architecture?
The Fabric architecture is a spatial dataflow design. Instead of pushing one instruction at a time through a pipeline, it lays your program out as a graph across a tiled grid of reconfigurable processing elements. There is no central program counter. Each operation fires when its inputs arrive, and the graph stays resident on chip for millions of cycles.
Where does the energy saving actually come from?
Most of the energy a conventional processor spends never touches your data. It goes into fetching and decoding instructions, and into moving values back and forth between registers, caches and memory. The Fabric removes that overhead structurally: values pass directly from the operation that produced them to the operation that needs them. That is the whole source of the up to 100x greater energy efficiency, and it is why the gain holds across a whole application rather than one hot kernel.
Is this an accelerator, an FPGA, or a domain-specific chip?
None of the three. An accelerator speeds up a fixed set of kernels and leaves the rest of your application on a host processor. An FPGA is configured with hardware description languages and a synthesis flow measured in hours. The Fabric architecture is general purpose: it runs whole applications, including irregular control flow and irregular memory access, and it is programmed in C and C++ with a compiler that finishes in minutes.
Do I have to write my code differently?
No. The effcc Compiler is a drop-in replacement for GCC and Clang, and it extracts parallelism from standard programming languages like C and C++ without annotations. You point it at your existing source and your existing build. Functions you want resident on the Fabric are marked with a single function attribute.
Does the Fabric replace the processor or sit alongside one?
It replaces it. The Electron E1 general-purpose processor is a complete part rather than a block you add to a host processor. It runs your whole application, including the control flow and the program entry that do not belong in a dataflow graph, so there is no companion microcontroller in the design and no traffic between two chips to budget for.
What workloads is this good at?
The Electron E1 handles sensor fusion, signal processing, control loops, and neural network inference, which is to say the mix an always-on device actually runs rather than one kernel in isolation.
Does the energy efficiency cost me performance?
No, because the parallelism that saves energy is the same parallelism that does the work. Many operations run at once across the grid, so the Fabric sustains real throughput at low clock rates and low voltage. In turn, this means higher performance in addition to order-of-magnitude better energy efficiency.
How mature is this? Is there silicon?
Yes. The Electron E1 general-purpose processor exists in silicon, and the Electron E1 Evaluation Kit puts it on a board to bring up your applications on our silicon.
What does adopting this cost me in schedule?
Less than a new architecture usually costs, because the parts of your project that take time to change do not have to change. Your source stays C and C++, your build stays yours, and the effcc Compiler drops in where GCC or Clang sits today, so the first build is a compiler swap and a target flag rather than a rewrite. Compiles finish in minutes, so the development loop you work in now is the one you keep.
What happens when my application changes after the product ships?
You rebuild and reflash. How your program is laid out on the Fabric is decided by the compiler at build time and is not fixed in the silicon, so a new version of your application is a new build and a firmware update. Changing what the product does never means changing the part it does it on.
How do you measure energy efficiency?
On hardware, not in simulation. We compile the workload, run it on real silicon, and measure with a power analyzer on an isolated rail.
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