Physical AI and the energy wall at the edge
"Physical AI" is having its moment. Gartner lists it among the top technology trends for 2026, and NVIDIA calls it the next evolution in AI.
The industry now agrees that AI is moving beyond digital interfaces. Modern devices must interpret real environments, reason about changing conditions, and act within tight latency budgets. That only works when the intelligence runs on hardware in the physical world, not on a remote server.
The transition exposes a hard problem: physical AI demands far more energy than conventional embedded platforms can supply. Devices need continuous sensing, multimodal perception, and model execution at scales traditional processors cannot sustain inside embedded energy budgets. Physical AI is forcing the industry to confront the energy limits that have constrained deployments in the field for years.
Why physical AI must run on the device
Physical environments do not tolerate unpredictable latency. To produce the next action, a system parses camera streams, depth data, audio, inertial measurements, and environmental signals at high temporal resolution. NVIDIA describes the loop as "perceiving, reasoning, and acting". The full loop has to run locally to preserve safety, accuracy, and determinism.
The cloud cannot close that loop. Round-trip delay breaks real-time operation. An industrial robot navigating a crowded facility cannot pause for cloud inference. A wearable monitoring physiology around the clock cannot risk gaps in operation. An infrastructure sensor making safety decisions cannot depend on intermittent connectivity.
Physical AI removes the luxury of offloading. It needs dense compute that fits embedded constraints.
The new performance and energy demands of on-device AI
Running these workloads on-device creates a new class of requirements. Continuous perception demands far more compute than the microcontroller-class processors in today's devices can sustain, and it has to fit within milliwatt energy budgets and tight thermal limits. Battery-powered products have no room for a larger battery, and industrial designs have no space for a larger heat sink. Real-time perception also runs several models at once, with parallel pipelines for detection, prediction, and control.
Those constraints push energy efficiency to the foreground. Traditional processors handle simple AI. Physical AI needs larger models, richer feature extraction, and broader context, and the energy cost climbs with each step.
Why current processor architectures fail at physical AI
In a modern processor, moving data costs far more energy than doing arithmetic. Physical AI magnifies that cost because models demand frequent parameter access and high bandwidth between memory and compute.
Most embedded processors still follow the same basic design as every mainstream CPU: compute sits on one side, memory on the other, and data shuttles between them through narrow pathways built for sequential general-purpose computation, not continuous parallel inference. Every trip through the memory hierarchy burns energy.
Quantizing or pruning a model does not remove that cost. It only shrinks the workload that pays it. And physical systems cannot trade away accuracy, safety, or responsiveness. Degrading model complexity to fit an energy budget makes mission-critical behavior unstable.
The bottleneck is architectural.
Why heterogeneous accelerators fall short
The industry's answer so far is the heterogeneous SoC: a CPU, GPU, NPU, and DSP on one die. These designs speed up specific kernels, but they do not fix whole-pipeline energy behavior. Data still moves between engines, and software still orchestrates execution across multiple toolchains. The handoffs reintroduce the energy cost that specialization was supposed to remove.
Physical AI needs the entire application to run locally. Multi-engine designs fragment it instead. The result accelerates a few operators efficiently yet still struggles to run a complete perception-and-control loop within the device's energy budget. As workloads grow more complex, the shortfall grows with them.
The industry needs a new computing foundation
Physical AI has made the change urgent.
Designers need compute that treats energy as the primary design consideration, not a secondary constraint. That means an architecture that minimizes data movement, sustains deterministic performance, and runs AI, control, and general-purpose logic without fragmentation, so the whole application operates at high efficiency, not just an isolated kernel.
This is the problem we built the Fabric architecture to solve. The Fabric is a spatial dataflow design: instead of shuttling values through a memory hierarchy, it keeps them close to compute, cutting the data movement that dominates energy in current processor architectures. The Electron E1 general-purpose processor brings the Fabric to embedded systems, and the effcc Compiler compiles existing C/C++ for it, so adopting the architecture does not mean rewriting the application.
Physical AI will not scale until devices deliver sustained inference inside real energy budgets. That takes a new foundation, and we built one.